Field of the Disclosure
The present application relates to a flat panel display device, and more particularly to a flat panel display device with oxide thin film transistor and a fabricating method which are adapted to secure reliability and structural stability of elements.
Description of the Related Art
The flat panel display device such as a liquid crystal display device drives a display element using an active element, such as a thin film transistor, which is disposed in each pixel. Such a driving mode of the display device is called as an active matrix driving mode. In the active matrix driving mode, the thin film transistor is disposed in each pixel and is used to drive the respective pixel.
Currently, a thin film transistor with a channel layer formed from one of an amorphous silicon film and a polycrystalline silicon film is being most widely used.
The amorphous silicon film can be thinly deposited at a lower temperature than 350° C. However, the mobility of amorphous silicon is slow below 0.50 cm2/Vs. Due to this, it is difficult for amorphous silicon to realize high definition and high driving speed in a super-sized screen. On the other hand, polycrystalline silicon has a high mobility of several tens through several hundreds cm2/Vs.
In view of this point, the amorphous silicon thin film transistor is utilized for driving the pixel, and the polycrystalline thin film transistor is utilized for driving and controlling the entire screen or picture.
FIG. 1 is a cross-sectional view illustrating a flat panel display device with polycrystalline silicon thin film transistors and a fabricating method thereof according to the related art.
Referring to FIG. 1, the flat panel display device using a polycrystalline thin film transistor includes a thin film transistor 30 formed on a substrate 11, and a pixel electrode 21 connected to the thin film transistor 30.
The thin film transistor 30 includes a buffer film 12 formed on the entire surface of the substrate 11, a semiconductor layer 13 formed on the buffer film 12, and a gate insulation film 15 formed on the entire surface of the buffer film 12 in such a manner as to cover the semiconductor layer 13. Also, the thin film transistor 30 includes a gate electrode 16a formed on the gate insulation film 15, an interlayer insulation film 17 formed on the entire surface of the gate insulation film 15 which is provided with the gate electrode 16a, and source and drain electrodes 18a and 18b formed on the interlayer insulation film 17 and connected to source and drain regions 14a and 14b of the semiconductor layer 13, respectively.
The flat panel display device further includes a passivation film 19 formed on the interlayer insulation film 17 provided with the source and drain electrodes 18a and 18b. The pixel electrode 21 is formed on the passivation film 19 and connected to the drain electrode 18b through a contact hole 20 which is formed in the passivation film 19.
Also, the method of fabricating such a flat panel display device includes sequentially forming the buffer film 12, the semiconductor layer 13, the gate insulation film 15 and the gate electrode 16a on the substrate 11, injecting a dopant into the semiconductor layer 13, and sequentially forming the interlayer insulation film 17, the source and drain electrodes 18a and 18b, the passivation film 19 and the pixel electrode 21 on the gate insulation film 15 which is provided with the gate electrode 16a. 
The semiconductor layer 13 formed from polycrystalline silicon can be obtained by crystallizing the amorphous silicon layer. The polycrystalline silicon semiconductor layer 13 obtained from the crystallization of amorphous silicon can have a comparative satisfactory crystallinity, but must be treated at a high temperature of above 1000° C.
The doping procedure for the semiconductor layer 13 includes forming low density regions using the gate electrode 16a as a mask, and forming high density regions using a photoresist pattern, which exposes portions of the semiconductor layer 13 corresponding to the source and drain regions 14a and 14b, as another mask. The low density regions (not shown) are used to reduce an off-current of the thin film transistor 30. The high density regions become the source and drain regions 14a and 14b. 
However, the formation of high density regions using the photoresist pattern, which exposes the portions of the semiconductor layer 13 corresponding to the source and drain regions 14a and 14b, as a mask requires an additional mask procedure with the exception of a mask procedure for forming the gate electrode 16a. 